Staff/ Senior Staff Engineer, STA
Renesas Electronics · Bengaluru, KA, India
About the role
STA Engineer focused on timing closure and signoff for block-level and full-chip SoC designs. Works with RTL, synthesis, CTS and physical design teams to resolve timing violations and drive tapeout readiness.
What you'll do
- Perform block-level and full-chip STA across modes and corners in MMMC environments
- Debug setup/hold/clock gating and signal-integrity timing violations
- Develop and validate SDC timing constraints and exceptions
- Drive timing closure through ECO and optimization
- Support tapeout signoff and PVT variation analysis
What they're looking for
- B.E./M.E. in EE, VLSI or microelectronics
- 7-13 years STA and timing closure experience
- PrimeTime and/or Tempus proficiency
- SDC, OCV/AOCV/POCV, MMMC knowledge
- Scripting in Tcl/Perl/Python
Key details
- Company
- Renesas Electronics
- Location
- Bengaluru, KA, India
- Work mode
- On-site
- Seniority
- Lead / Principal / Group
- Employment type
- Full-time
- Role category
- Engineering
- Experience
- 7 to 13 years
- Posted
- 22 Oct 2026
- Source
- jobs.smartrecruiters.com